Time Representation in Prolog Circuit Modelling

Lichtenstein, Yossi, Welham, B. and Gupta, A. (1991) Time Representation in Prolog Circuit Modelling. In: 3rd UK Association for Logic Programming Annual Conference, 1991-04-10 - 1991-04-12.

Full text not available from this repository.

Item Type:	Conference or Workshop Item (Paper)
Faculty \ School:	Faculty of Social Sciences > Norwich Business School
Depositing User:	Elle Green
Date Deposited:	06 Jul 2012 13:27
Last Modified:	24 Sep 2024 07:17
URI:	https://ueaeprints.uea.ac.uk/id/eprint/39111
DOI:

Actions (login required)

View Item