Lichtenstein, Yossi, Welham, B. and Gupta, A. (1991) Time Representation in Prolog Circuit Modelling. In: 3rd UK Association for Logic Programming Annual Conference, 1991-01-01.
Full text not available from this repository.Item Type: | Conference or Workshop Item (Paper) |
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Faculty \ School: | Faculty of Social Sciences > Norwich Business School |
Depositing User: | Elle Green |
Date Deposited: | 06 Jul 2012 13:27 |
Last Modified: | 17 Sep 2021 00:34 |
URI: | https://ueaeprints.uea.ac.uk/id/eprint/39111 |
DOI: |
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