Reconfigurable neurons-making the most of configurable logic blocks (CLBs)

Ghani, Arfan, See, Chan H., Migdadi, Hassan, Asif, Rameez, Abd-Alhameed, Raed A.A. and Noras, James M. (2015) Reconfigurable neurons-making the most of configurable logic blocks (CLBs). In: 2015 Internet Technologies and Applications, ITA 2015 - Proceedings of the 6th International Conference. 2015 Internet Technologies and Applications, ITA 2015 - Proceedings of the 6th International Conference . Institute of Electrical and Electronics Engineers Inc., GBR, pp. 475-478. ISBN 9781479980369

Full text not available from this repository. (Request a copy)

Abstract

An area-efficient hardware architecture is used to map fully parallel cortical columns on Field Programmable Gate Arrays (FPGA) is presented in this paper. To demonstrate the concept of this work, the proposed architecture is shown at the system level and benchmarked with image and speech recognition applications. Due to the spatio-temporal nature of spiking neurons, this has allowed such architectures to map on FPGAs in which communication can be performed through the use of spikes and signal can be represented in binary form. The process and viability of designing and implementing the multiple recurrent neural reservoirs with a novel multiplier-less reconfigurable architectures is described.

Item Type: Book Section
Additional Information: Publisher Copyright: © 2015 IEEE.
Uncontrolled Keywords: fpgas,neural signal processing,reconfigurable computing,recurrent neural networks,reservior computing,computer science applications,computer networks and communications ,/dk/atira/pure/subjectarea/asjc/1700/1706
Faculty \ School: Faculty of Science > School of Computing Sciences
Related URLs:
Depositing User: LivePure Connector
Date Deposited: 07 Sep 2022 08:32
Last Modified: 22 Sep 2022 23:56
URI: https://ueaeprints.uea.ac.uk/id/eprint/87751
DOI: 10.1109/ITechA.2015.7317451

Actions (login required)

View Item View Item