Reducing ATM cell processing in SDH multiplexers

Parr, Gerard ORCID: and Wright, Stephen (1996) Reducing ATM cell processing in SDH multiplexers. In: Proceedings of the 1996 4th IEEE AFRICON Conference. Part 1 (of 2). The Institute of Electrical and Electronics Engineers (IEEE), ZAF, pp. 118-123. ISBN 0-7803-3019-6

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STM-1 frames are defined to be transmitted every 125 /spl mu/s, which is 8000 frames per second. An administrative unit of type AU-4 may be used to carry, via the virtual container of type VC-4, three tributary units of type TU-32, four of type TU-3, or 44.15 asynchronous transfer mode cells. The section overhead of the STM-1 frame exists between two adjacent multiplexers or regeneration sections. The received payload is assumed to be extracted by the multiplexer and forwarded to the next appropriate outgoing port based on relevant state information. This is obviously a time consuming and unnecessary operation if the cells within the container are not destined for this drop/insert trib. A performance gain could be achieved if the multiplexer can know when to shift an entire container to the east/west without having to extract and examine each individual cell in the payload. This can be achieved by using the current partially defined Z3, Z4 and Z5 bytes of the POH. The Z3 byte to denote unique VCI, Z4 byte to denote unique VPI and Z5 byte to denote that all the payload is for a single destination (to ensure integrity). This paper illustrates the implementation of this approach and the improvements to be gained.

Item Type: Book Section
Faculty \ School: Faculty of Science > School of Computing Sciences
UEA Research Groups: Faculty of Science > Research Groups > Smart Emerging Technologies
Faculty of Science > Research Groups > Cyber Security Privacy and Trust Laboratory
Depositing User: Pure Connector
Date Deposited: 24 Sep 2016 01:08
Last Modified: 14 Mar 2023 08:35
DOI: 10.1109/AFRCON.1996.563092

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