Industrial experience with test generation languages for processor verification

Behm, Michael, Ludden, John, Lichtenstein, Yossi, Rimon, Michal and Vinov, Michael (2004) Industrial experience with test generation languages for processor verification. In: 41st Annual Design Automation Conference, 2004-06-01.

Full text not available from this repository.


We report on our experience with a new test generation language for processor verification. The verification of two superscalar multiprocessors is described and we show the ease of expressing complex verification tasks. The cost and benefit are demonstrated: training takes up to six months; the simulation time required for a desired level of coverage has decreased by a factor of twenty; the number of escape bugs has been reduced.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Nominated for best paper award
Uncontrolled Keywords: processor verification,test generation,functional verification
Faculty \ School: Faculty of Social Sciences > Norwich Business School
Related URLs:
Depositing User: Elle Green
Date Deposited: 06 Jul 2012 08:53
Last Modified: 02 Mar 2023 12:32
DOI: 10.1145/996566.996578

Actions (login required)

View Item View Item